Computer
Architecture
I
Lecture
1:
Welcome
and
IntroducAon
Instructor:
David
Black-‐Schaffer
TAs:
Muneeb
Khan
and
Andreas
Sembrant
Today,
Part
1
•
About
the
Course
– What
is
computer
architecture?
– Why
should
you
care?
•
Ge ng
to
Know
One
Another
•
Administra\ve
Details
– RegistraAon
– Labs
– Grading
– Schedule
About
the
Course
•
Introductory
course
to
computer
architecture
(Not
for
IT/DV
students;
they
take
the
7.5hp
one)
•
How
a
computer
is
built
– Logic
-‐>
circuits
-‐>
datapath
•
How
a
computer
is
controlled
– Basic
operaAons
-‐>
microarchitecture
-‐>
instrucAons
(ISA)
-‐>
assembly
•
Contents
(in-‐order)
– MIPS
assembly
– Logic
design
(adders,
ALU,
control)
– Performance
analysis
– Data
path
and
pipelining
– Input/Output
– Caches
– Virtual
memory
After
This
Course,
You
Should…
• Understand
the
funcAonality
and
operaAon
of
the
basic
elements
of
a
computer
system
including
processor,
memory
and
input/output
• Reason
about
first-‐order
performance
• Understand
the
hardware/software
interface
• Understand
and
be
able
to
write
programs
in
assembly
language
Credits
• Slides
and
material
adapted
from
– Karl
Marklund
– JusAn
Pearson
– Stefanos
Kaxiras
(Slides
originally
developed
by
Profs.
Hill,
Falsafi,
Marculescu,
Pa erson,
Rutenbar
and
Vijaykumar
of
CMU,
Purdue,
UCB,
UW,
Copyright
2003)
– Tanenbaum,
Structured
Computer
OrganizaAon,
Fifth
EdiAon,
(c)
2006
Pearson
EducaAon,
Inc.
QuesAons
You
Should
Be
Asking
• Why
MIPS?
(None
of
us
has
a
MIPS
computer…)
– It’s
clean
and
easy
to
understand
– x86
is
not
•
Why
should
I
study
computer
architecture?
Why
Should
Study
Computer
Architecture?
• Press
release
from
last
week…
• ARM
introduced
the
“
big.LITTLE”
processor
• Huh?
From
The
Register
Backup:
Who
Knows
What
ARM
is?
• Q:
How
many
of
you
have
an
ARM
computer?
– A:
All
of
you
From
The
Economist
A
R
M
What
Exactly
Are
They
Doing?
LITTLE
BIG
• What
is
big.LITTLE?
•
Big
cores
for
high
performance
•
Li le
cores
for
low
power
From
ARM
Pow
er
Performance
Why
is
ARM
Doing
This?
LITTLE
BIG
•
Power
Efficiency
=
calculaAons/energy
The
Details
LITTLE
BIG
LITTLE
• Simple
(→
fewer
funcAonal
units)
• Short
pipeline
(→
slower
clock)
BIG
• Complex
• More
funcAonal
units
• Out
of
order
execuAon
• Long
pipeline
• Faster
clock
• Bigger
branch
penalty
From
ARM
Why
Can
They
Do
This?
• Scaling:
We
can
build
more
transistors
than
we
know
how
to
use
12/2005
6/2004
12/2002
6/2001
12/1999
6/1998
12/1996 6/1995
A
whole
1995
processor
fits
in
this
much
of
a
2005
processor.
Why
Should
They
Do
This?
• Can’t
increase
power:
Need
to
improve
power
efficiency
tional
ap for
www.
ITRS/
edicts
nuing
ecade,
bably
tinue
r den-
uits at
more
ars.
s this
using
rtical
ap for
erfor-
ately
0
1
10
100
1,000
10,000
100,000
1,000,000
10,000,000
1985
1990
1995
2000
2005
2010
Relative performance
Number of transistors (thousands)
Clock speed (MHz)
Power type (W)
Number of cores/chip
Year of introduction
Transistors per chip
Figure 1. Transistors, frequency, power, performance, and processor cores over time. The
Power
Wall
From
Fuller
2011
What
are
Others
Doing?
• GPUs:
Lots
and
lots
of
very
small
cores
Nvidia
Fermi
AMD
Barts
This
is
Computer
Architecture
• Understanding
performance
and
efficiency
•
Design
tradeoffs
in
execuAng
instrucAons
• Building
the
hardware
• Making
it
programmable
vs.
vs.
So,
Why
Should
You
Care?
• Computers
are
evolving
very
fast
• Need
to
understand
how
they
work
to
understand
why
they
are
changing
• Computer
Architecture
is
criAcal
to
performance
and
efficiency
•
Not
just
about
designing
hardware:
– How
does
big.LITTLE
affect
software?
– How
easy
is
it
to
program
a
GPU?
QuesAons?
GETTING
TO
KNOW
ONE
ANOTHER
About
Me
•
I’m
American
(as
if
you
haven’t
no\ced…)
– From
a
different
system
(e.g.,
graded
homework)
– May
speak
too
quickly
–
Tell
me
if
I’m
doing
something
wrong
(and
how
to
make
it
be er)
•
Background
– Power-‐efficient
computer
architecture
– Taught
intro/advanced
digital
design
courses
– Worked
in
industry
(Apple)
on
CPU/GPU
programming
systems
(OpenCL)
– Speak/understand
Swedish
pre y
well
About
You
• What
program(s)
are
you
in?
• What
year(s)
are
you
in?
•
Why
are
you
taking
this
course?
• Will
you
do
the
assigned
reading
before
class?
(Would
in-‐class
short
quizzes
help?)
• Would
you
do
suggested
prac\ce
problems?
About
Your
Background
• How
many
have
taken
an
impera\ve
programming
course?
– Java,
C,
C++,
C#,
FORTRAN
(I
hope
not…),
MATLAB
– Not
funcAonal
languages
such
as
ML
or
Erlang
• How
many
have
seen
digital
design?
– AND/OR
gates,
mux/demux,
Karnaugh
maps
– Flipflos,
finite
state
machines
• How
many
care
about
the
speed
of
your
code?
Prerequisites
•
Basic
programming
(programmeringsteknik
II)
for
(int
i=0;
i<10;
i++)
{
a[i]
=
calculate(size,
b[i]);
}
•
Interest
in
how
computers
work
and
why
they
are
fast
or
slow
Feedback
from
Students
Last
Year
• Overall
evaluaAon:
3.4
• What
was
good?
– The
lab
assignments
(but
they
were
a
lot
of
work)
– The
textbook
• What
could
be
improved?
– AdministraAon
of
the
course
– Assignment
details
– Fit
in
all
the
lectures
• What
are
we
changing?
–
Clear
schedule,
deadlines,
and
office
hours
–
Extra
TA-‐run
tutorial
for
second
lab
–
Extra
review
sessions
at
the
end
3
QuesAons?
ADMINISTRATIVE
DETAILS
Registering
for
the
Course
•
Admi ed
students:
– Register
online
in
studentportalen
•
Unregistered
students:
– Register
at
www.antagning.se
(before
7
Nov)
•
MS
students:
contact
your
program
coordinator
•
Exchange
students:
contact
Ulrika
Jaresund
•
Students
with
older
registra\ons:
contact
IT
dept.
Reading
“
Computer
Organiza\on
&
Design:
The
Hardware/
Software
Interface”
Pa erson
and
Hennesy.
4th
EdiAon,
Morgan
Kaufman
2007.
(Third
ediAon
is
fine.)
• This
is
a
great
book
and
the
lectures
will
largely
follow
the
flow
of
the
book.
• You
should
read
the
book.
(Really,
please
read
it.)
Labs
•
MIPS
Assembly
(Programming)
– 2-‐Nov
to
9-‐Nov
(1
week)
–
Tutorial
1-‐Nov
•
32-‐bit
Adder
(Logic
Design)
– 9-‐Nov
to
16-‐Nov
(1
week)
–
Tutorial
11-‐Nov
•
Data
Path
(Logic
Design)
– 16-‐Nov
to
28-‐Nov
(~2
weeks)
•
Interrupt-‐driven
I/O
(Programming)
– 30-‐Nov
to
7-‐Dec
(1
week)
•
Memory-‐mapped
I/O
(Programming)
– 7-‐Dec
to
14-‐Dec
(1
week)
• Labs
will
be
done
in
pairs.
If
you
can’t
find
a
partner
let
us
know
and
we’ll
arrange
one
for
you.
Grading
•
5hp
=
3hp
(exam)
+
2hp
(labs),
UG/3/4/5
–
All
labs
must
be
submi ed
on
Ame
for
any
lab
credit
– Missed
labs
may
be
turned
in
after
the
course,
but
will
limit
the
total
lab
grade
to
3
– Labs
will
be
graded
within
1
week
on
a
scale
of
1-‐5
– You
have
1
week
to
request
a
lab
re-‐grade
•
Why
so
harsh?
– Labs
are
the
best
way
for
you
to
learn
the
material
– We
want
you
to
take
them
seriously
and
get
them
done
on
Ame
•
2
late
days
to
use
during
the
course
– You
must
tell
us
when
you
use
them
– Note
that
you
sAll
have
a
lab
due
the
next
week
How
to
Get
Help
•
Office
Hours
– David:
Thursday
13.00-‐15.00
(office
1240)
– Muneeb:
Monday
9.00-‐11.00
(P1549)
– Andreas:
Wednesday
15.00-‐17.00
(P1549)
(Other
Ames
by
appointment,
but
no
guarantees.)
•
Email
–
Preface
all
email
subjects
with
“dark:”
– Lab/grading
quesAons
to
Muneeb/Andreas
– Course
administraAon
quesAons
to
David
– General
quesAons
to
any
of
us
– We
will
try
to
respond
promptly,
but
no
later
than
our
next
scheduled
office
hours
at
worst.
Schedule
Week Lecture
Reading
Lab
Session
43
Intro
Instruction Set Architecture I
2.1-2.6
44
Instruction Set Architecture II
2.7-2.10 (stop at the Java bit), 2.13
(good summary), 2.17, 2.18
MIPS Assembly
SPIM/LogicSim
Arithmetic and Integer Numbers
3.1-3.4, 3.5 (optional), 3.6 (to the
MIPS operands), 3.8-3.9
45
Logic
B.1-B.3, B.5
32-bit Adder
Logic
Performance
4.1-4.6
46
Data path 1
5.1-5.4
Data path
Data path 2 (multicycle)
5.5-5.6, 5.10-5.11
47
Data path 3 (pipelining)
6.1-6.3
Data path 4 (hazards)
6.4-6.6, (6.9 optional) 6.11-6.12
48
I/O
8.1-8.5, 8.9-8.10
Interrupt-driven I/O
Memories
7.1, B.9
49
Caches
7.2-7.3
Memory-mapped I/O
Virtual Memory 1
7.4
50
Virtual Memory 2
7.5, 7.7-7.8
Review
Review
51
Exam
TIME
TO
GET
STARTED!
